VHDL

VHDL is a hardware description language (HDL) used to design and simulate digital circuits, FPGAs and chips. It doesn't describe steps but the behavior and structure of hardware. A standard in electronic engineering.

• Creado por Departamento de Defensa de EE.UU.
• Año 1980
• Paradigma: Hardware description · concurrent
• Extensiones: .vhd, .vhdl

Para qué se usa

• FPGA design
• Chip (ASIC) design
• Circuit simulation

A favor

• Hardware standard
• Very expressive
• Strongly typed

En contra

• Very verbose
• Steep curve
• Hardware-only

Ecosistema

• GHDL
• ModelSim
• Vivado
• Quartus

Ejemplo

entity hola is end;
architecture sim of hola is
begin
  process begin
    report "¡Hola, mundo!";
    wait;
  end process;
end;